The present invention relates to the fabrication of semiconductor integrated circuits (IC's). More particularly, the present invention relates to improved methods and apparatuses for controlling the amount of neutral reactants delivered to a substrate during processing of the substrate.
During the manufacture of a semiconductor-based product, for example, a flat panel display or an integrated circuit, multiple deposition and/or etching steps may be employed. By way of example, one method of etching is plasma etching. In plasma etching, a plasma is formed from the ionization and dissociation of process gases. The positively charged ions are accelerated towards the substrate where they, in combination with neutral reactants, drive the etching reactions. In this manner, etched features such as vias, contacts, or trenches may be formed in the layers of the substrate.
One particular method of plasma etching uses an inductive source to generate the plasma. FIG. 1 illustrates a prior art inductive plasma processing reactor 100 that is used for plasma etching. A typical inductive plasma processing reactor includes a chamber 102 with an antenna or inductive coil 104 disposed above a dielectric window 106. Typically, antenna 104 is operatively coupled to a first RF power source 108. Furthermore, a gas port 110 is provided within chamber 102 that is arranged for releasing gaseous source materials, e.g., the etchant source gases, into the RF-induced plasma region between dielectric window 106 and a substrate 112. Substrate 112 is introduced into chamber 102 and disposed on a chuck 114, which generally acts as a bottom electrode and is operatively coupled to a second RF power source 116.
In order to create a plasma, a process gas is input into chamber 102 through gas port 110. Power is then supplied to inductive coil 104 using first RF power source 108, and a large electric field is produced inside chamber 102. The electric field accelerates the small number of electrons present inside the chamber causing them to collide with the gas molecules of the process gas. These collisions result in ionization and initiation of a discharge or plasma 118. As is well known in the art, the neutral gas molecules of the process gas when subjected to these strong electric fields lose electrons, and leave behind positively charged ions. As a result, positively charged ions 120 and negatively charged electrons 122 are contained inside plasma 118. Furthermore, neutral gas molecules 124 (and/or atoms) are contained inside plasma 118 and throughout chamber 102.
Once the plasma has been formed, neutral gas molecules 124 inside the plasma are directed towards the surface of the substrate by diffusion, i.e., the random movement of molecules inside the chamber. In this manner, a layer of neutral reactants 126 (e.g., neutral gas molecules) is typically formed along the surface of substrate 112. Correspondingly, when bottom electrode 114 is powered, ions 120 tend to accelerate towards the substrate where they, in combination with neutral reactants 126, activate the etching reaction. As can be appreciated by those skilled in the art, there are many different types of processes that use varying amounts of ions and neutral reactants to complete the etch. By way of example, in a neutral reactants driven process, the plasma is required to contain a greater concentration of neutral reactants to accelerate the reaction. On the other hand, in ion driven processes, the plasma is required to contain a greater concentration of ions to accelerate the reaction.
One problem that has been encountered with both neutral reactants driven processes and ion driven processes has been a non-uniform etch rate. For example, one area of the substrate may be etched at a faster rate than another area. In neutral reactants driven processes, and while not wishing to be bound by theory, it is believed that there is a greater concentration of neutral reactants at the edge of the substrate and therefore the edge gets etched at a faster rate. Referring back to FIG. 1, the density of neutral reactants 126 is greater in regions 130 because they are disposed above a portion of the bottom electrode and therefore do not get consumed as readily as neutral reactants disposed above a portion of the substrate.
Furthermore, a non-uniform etch rate may lead to device failure in the semiconductor circuit. By way of example, a non-uniform etch may cause undercutting in the side walls of a trench. Typically, undercutting reduces the thickness of the conducting line or in some cases causes line breakage, which may lead to device failure. Still further, non-uniformity etching generally adds time to the etching process, which reduces substrate throughput.
One approach to achieving a uniform etch has been to provide a uniformity ring inside the plasma reactor. Broadly speaking, the uniformity ring is designed to surround the substrate with a wall that blocks a portion of the neutral reactants, in particular the neutral reactants located in the high density neutral reactants area, from diffusing into the substrate. In this manner, a more uniform etch may be achieved because the neutral reactants at the edge of the substrate are prevented from interacting with the substrate. Furthermore, in order to allow the ingress and egress of the substrate, the uniformity ring has been configured to move up and down.
Referring to FIGS. 2A & 2B, a movable uniformity ring 202 is shown in conjunction with plasma processing chamber 100 of FIG. 1. FIG. 2A shows the movable uniformity ring 202 in a down position, and FIG. 2B shows the movable uniformity ring 202 in an up position. For the most part, when the movable uniformity ring 202 is in the down position, neutral reactants 204 near the edge of a substrate 206 are substantially blocked from diffusing into the edge of the substrate 206, and when the movable uniformity ring 202 is in the up position, a space 210 between the uniformity ring 202 and the bottom electrode 208 is provided for the ingress and egress of the substrate 206.
However, moving the uniformity ring has its drawbacks. Typically, moving structures that are placed above the substrate during processing tend to cause contamination of the substrate. This is because such structures present surfaces for depositing etch by-products (e.g., polymers) and when the uniformity ring is moved, the deposits may flake off onto the substrate, causing particle contamination. Particle contamination may produce undesirable and/or unpredictable results. For example, particles on the substrate surface may block a portion of the substrate that needs to be etched. In this manner, a trench may not be formed properly and this may lead to device failure and therefore a reduction in productivity. Additionally, the bottom electrode may be configured to move up and down with the same result.
Another approach to achieving a uniform etch has been to provide a stationary uniformity ring with a slit. The slit is typically configured for the egress and ingress of the substrate. However, the slit has its drawbacks. For the most part, the slit is only configured on one side of the uniformity ring or in only a portion of the uniformity ring and therefore the species are not distributed evenly around the substrate during processing. That is, one area of the substrate is in contact with a greater amount of reactive species than another area. This tends to produce a non-uniform etch rate. Furthermore, the slit produces more corners and surface area, which tend to provide surfaces for depositing material. This generally makes it difficult to clean and contributes to increased contamination. Additionally, openings in the uniformity ring are difficult to manufacture, especially with the materials that are generally used to form the uniformity ring.
In view of the foregoing, there are desired improved methods and apparatuses for obtaining a more uniform etch rate, using a uniformity ring to control the amount of reactants delivered to a substrate, while providing the ingress and egress of the substrate, and without moving the uniformity ring or producing a non-symmetrical flow pattern near the uniformity ring.